A bit slice system provides a designer with the tools to customize a processor to the needs of a given application. The bit slice architecture utilizes a bit slice processor which is comprised of a microsequencer and an expanded bit slice arithmetic logic unit (ALU). The microsequencer is combined with a microprogram memrory and a microinstruction register to provide control codes for the bit slice ALU. This type of a processor is effectively a computer for disposal within a more sophisticated computer architecture. With the bit slice system, the designer can define the details of the system operation, including the instruction set to be implemented. This allows the designer to deviate from the preset instruction set which is common to most processors.
The bit slice ALU is a fundamental part of the system. This element is designed so that it can be connected to similar elements to provide an ALU of any desired word width. Central to the ALU slice is that its operation can be expanded to any number of bits by interconnection of like ALUs. For example, if any ALU with eight bits per circuit is utilized, four circuits would form the ALU for a thirty-two bit processor. The carry and shift lines provide communication between ALUs so that multiple bit arithmetic operations can be performed.
The microsequencer processes the instructions steps in a predetermined sequence and outputs control information to the remaining portions of the bit slice processor. The microsequencer has built-in storage space in the form of a register stack. This is typically a push/pop register stack which is accessible to read data therefrom or write data thereto. Stack pointers are provided to determine the last address in the register at which memory as extracted from or written to. These register stacks have some disadvantages in that retrieval of information therefrom can cause the contents of the stack to be disturbed. For example, if information is to be read from the stack, it is typically placed in the top register in the stack and read therefrom. This requires the stack to be positioned at such a point that the top register therein can be read. This may require an additional stack pointer register to store the previous pointer location. Additionally the contents of the register can be disturbed when an attempt is made to store too much data or to extract too much data from the stack. This results when the stack pointer is incremented too far in one direction or the other.